The need for higher-density packaging becomes increasingly severe in recent years. For this reason, “multilayer substrates” including lamination of a plurality of insulating layers are often used as substrates for various modules to be mounted on printed circuit boards.
A typical multilayer substrate is manufactured by forming conductive patterns and other elements on respective insulating layers collectively constituting the multilayer substrate, and then laminating the insulating layers together. Connection between the conductive patterns formed on the different insulating layers is achieved by use of via holes penetrating the insulating layers (see Japanese Patent No. 2857270 and Japanese Unexamined Patent Publication No. 10(1998)-322021, for example).
Formation of the conductive patterns on the respective insulating layers usually applies two methods called a “subtractive method” and an “additive method”. In the subtractive method, a desired pattern is formed by selectively etching off a conductive layer, which is formed uniformly on an insulating layer in advance. In general, pattern formation by the subtractive method can achieve high accuracy in the thickness easily because a copper foil formed into a uniform thickness is applied to the conductive layer. However, this method poses a difficulty in controlling the width at high accuracy, and the accuracy of the width is even more reduced by an increase in the thickness of the conductive layer. In the additive method, a portion to draw a desired pattern is exposed and developed by use of a dry film, resist, and the like, and then metal is plated on the exposed pattern. Then, the pattern is finished by removing the dry film and the like. Pattern formation by the additive method can achieve high accuracy in the width direction because the width is accurately defined by the dry film and the like thus exposed and developed. However, the accuracy in the thickness direction depends on evenness of plating behavior, and the pattern formed by the additive method is apt to cause a relatively large variation in the thickness. For this reason, the additive method poses a difficulty in controlling the thickness at high accuracy.
As described above, the subtractive method and the additive method have advantages and disadvantages, respectively. The additive method is selected when the accuracy in the width direction is important, while the subtractive method is selected when the accuracy in the thickness direction is important. In the pattern formation, it is sufficient to apply either one of these two methods, and the two methods are not performed on a single surface at the same time.
In recent years, there is a growing demand for so-called embedding, which is a technique to embed inductance (L) and capacitance (C) on a substrate in addition to conductive patterns. The embedded L and C must meet the following requirements.
First, in terms of the L used in a high-frequency circuit, it is important to regulate the width direction of a pattern in order to control impedance. There is little impact on a transmission characteristic even when the pattern is relatively thin. On the contrary, a low direct-current resistance is desirable for the L used, for instance, in a smoothing circuit in a power system (such as a choke coil). Accordingly, it is important to maximize a cross-sectional area of a conductive pattern.
Meanwhile, in terms of the C used in a high-frequency circuit, it is important to reduce a variation in the capacitance. To be more precise, the variation in the capacitance needs to be suppressed within the range of ±5%. To achieve this, it is important to regulate the width direction of a pattern. However, there is no problem if the pattern is relatively thin. In addition, in terms of the conductive pattern, it is important to reduce the variations in the width and the thickness in order to control impedance.
Under such circumstances, there may be a case where it is necessary to combine “the L for a matching circuit” that requires the accuracy in the width direction of the pattern with “the L for a power circuit” (the choke coil) that requires the lowest direct-current resistance available, as represented by a substrate for a power amplifier. However, it is not possible to form these L elements having different characteristics on the same layer of the multilayer substrate by means of selecting one of the above-described patterning methods.
In other words, there are structural limitations and contradictions in pursuit of desired accuracy in the width and thickness of patterns, as represented by incapability of forming patterns in various thicknesses on the same layer, which lead to restriction of design freedom. As a result, it is difficult to respond to the needs for downsizing and improving performances of multilayer substrates.